PROFESSIONAL
SERVICE
EDITORSHIP
1.
Guest Editor, IEEE
Transactions on CAD special issue on High Level Design Validation and Test,
March 2001
2.
Guest Editor, IEEE
Transactions on Reliability special issue on Fault-Tolerant VLSI Systems,
December 2000
3.
Guest Editor, IEEE
Design and Test of Computers special issue on On-Line VLSI Testing,
October-December 1998
SELECTED
PANELS/PRESENTATIONS
l BMDO,
l IBM
Crypto division, "Hardware implementation of AES symmetric block ciphers",
l ASC
Inc.
l Panelist,
Fault Tolerance: Needs and Perspectives, IEEE International Symposium on Defect
and Fault Tolerance in VLSI Systems,
l Department
of Electrical Engineering,
l Department
of Computer Science,
l Panelist,
On-Line Testing: Industrial Practices, IEEE International Test Conference,
l Lucent
Bell Labs,
l NEC
C&C Research Lab,
PROFESSIONAL
ACTIVITIES
l
Program
Committee Member and Area Coordinator of Fault Tolerant Systems, IEEE International
Workshop on On-Line Testing, 2001
l Program
Committee Member, Design and Test in
l Program
Committee Member and Area Coordinator of Fault Tolerant Systems, IEEE
l Vice
secretary, IEEE Test Technology Technical Council, 2000
l International
Workshop on On-Line Testing, 2000
l Program
Committee Member, Design and Test in
l Steering
Committee Member (finance chair), IEEE International High-Level Design
Validation and Test Workshop, 2000
l Session
chair, IEEE VLSI Test Symposium, 2000
l Steering
Committee Member (publication chair), IEEE International High-Level Design
Validation and Test Workshop, 1999
l Vice
secretary, IEEE Test Technology Technical Council, 1999
l Program
Committee Member, IEEE International Workshop on On-Line Testing, 1999
l Program
Committee Member, IEEE International conference on VLSI Design, 1998
l Program
Committee Member, IEEE International High-Level Design Validation and Test
Workshop, 1998
l Program
Committee Member, IEEE International High-Level Design Validation and Test
Workshop, 1997
l Program
Committee Member, IEEE International High-Level Design Validation and Test
Workshop, 1996
l Finance
and Registration Chair, IEEE Symposium on Defect and Fault Tolerance in VLSI,
1996
l Coordinator/Chair,
l Coordinator/Chair,
University Booth Program at IEEE International Conference on Computer Aided
Design, 1996
l Coordinator/Chair,
University Booth Program at IEEE International Conference on Computer Aided
Design, 1995
l Program
Committee Member, IEEE Workshop on Defect and Fault Tolerance in VLSI, 1995
l Session
chair, "High Level Synthesis of VLSI Circuits," IEEE Great Lakes symposium on
VLSI, 1995
l Coordinator/Chair,
University Booth Program at IEEE International Conference on Computer Aided
Design, 1994
REVIEWER
l National
Science Foundation (2001 CAREER awards selection panel)
l IEEE
Transactions on Computers
l IEEE
Transactions on CAD of Integrated Circuits and Systems
l IEEE
Transactions on VLSI Systems
l IEEE
Design and Test of Computers
l ACM
Transactions on Design Automation of Electronic Systems
l IEEE
Computer
l IEEE
International Symposium on Circuits and Systems
l IEEE/ACM
Design Automation Conference
l IEEE/ACM
International High-Level Design Validation and Test Workshop
l IEEE
International Conference on Computer Design
l IEEE
International Workshop on Defect and Fault Tolerance in VLSI
l
IEEE/ACM
MEMBER
l IEEE
Computer Society and IEEE Test Technology Technical Council
l Association of Computing Machinery and ACM Special Interest Group on Design Automation