2011 NYU Workshop -

   3D Integration Workshop For High Performance Computing Systems

Program

April 17, 2011: Preparation day
20:30~22:30 Welcome Open House and Reception.
 
April 18, 2011: Day 1
08:30~09:00 Registration
09:00~09:15 NYU-AD opening
09:15~10:00 Keynote
  Ruchir Puri
IBM, USA
Challenges at the Dawn of 22nm Era: A view from the 3rd dimension
10:30~12:30 Session I: 3D Process Technology
  Pol Marchal
IMEC, Belgium
Accelerating 3D system development using PathFinding/SmartSamples
  Tadahiro Kuroda
Keio U., Japan
ThruChip Interface (TCI) for 3D System Integration
  Yicheng Lu
Rutgers U., USA
3D Integration of ZnO Films and its Nanostructures for Reconfigurable Electronics
  Jason Cong
UCLA, USA
3D Customizable Platforms
  Paul Franzon
NCSU, USA
Medium and Long Term Perspectives on Applications and Design of TSV-Based 3D Stacked Ics
12:30~13:30 Lunch
13:30~15:30 Session II: 3D Memory and FPGA
  Brian Lee
Petari USA Inc., USA
Review of future Storage Class Memory (SCM) architecture and challenges
  Yiran Chen
U. Pitt, USA
Integrating emerging memory atop CMP: opportunities and challenges from a designer perspective
  Jin-Woong Kim
Hynix, Korea
Future Challenges for 3D NAND Flash
  Kang Wang
UCLA, USA
3D CMOS Integration with Spintronics Devices for Nonvolatile Electronics
  Deming Chen
UIUC, USA
3D FPGAs with Nanotechnology
16:00~17:30 Panel Discussion on “The Future of 3D Integration”
    Sanjeev Sathe - Global Foundries, USA
Yang Du - Qualcomm, USA
Herb Huang - SMIC, China
Ahmed Jerraya - CEA-LETI, France
William H. Joyner - SRC, USA
Hsien-Hsin Lee - Gatech, USA
17:30~18:30 Bus to Almamoura Auditorium
18:30~20:30 Public Lecture & Dinner
  Tanay Karnik
Intel, USA
Intel Labs: Staying ahead of the Technology
 
April 19, 2011: Day 2
08:30~12:00 Visit NYU-AD Campus & Abu Dhabi City Tour
12:30~13:30 Lunch
13:30~15:30 Session III: Thermal, Reliability and Testing
  David Atienza
EPFL, Switzerland
Thermal-Aware System-Level Design of 3D Multi-Processor ICs with Inter-Tier Liquid Cooling
  Sachin Sapatnekar
U. Minnesota, USA
Design Automation Challenges in 3DIC Design
  Krish Chakrabarty
Duke U., USA
Testing and Design-for-Testability Solutions for 3D Integrated Circuits
  Jose Duato
UPV, Spain
Compact and Efficient Implementation of Flexible Routing in 3D NOCs
  An-Yeu Wu
NTU, Taiwan
Thermal-aware 3D NoC Designs
16:00~18:00 Session IV: 3D Circuit and Architecture
  Kaushik Roy
Purdue U., USA
Integrated Systems in the More-Than-Moore Era: Designing Low-Cost Energy-Efficient Systems Using Heterogeneous Components
  Luca Benini
U. Bologna &
ST Micro, Italy
Going up: 3D integration and many-core SoCs
  Gabe Loh
AMD, USA
Computer Architectures for Die Stacking
  Youn-Long Lin
NTHU, Taiwan
From Design Reuse for SOC to Manufacturing Reuse for 3D IC
  Mary Jane Irwin
PSU, USA
3D Opens New Directions in Computer Architecture Design
18:30~20:00 Dinner