Prof. Chao has been doing research on high-performance packet switching since 1989. He, together with his students and colleagues, has proposed several practical packet scheduling algorithms and architectures for large-scale packet switches. Some of them have been designed and implemented in VLSI chips and FPGA chips. A small multi-stage buffered packet switch system, called TrueWay Switch, has been prototyped at Poly's High-Speed Networking Lab. Much of his work can be found from his publications. He has also prototyped a small-scale optical WDM-ATM-Multicast (3M) switch, together with Prof. Fow-Sen Choa at University of Maryland at Balltimore, for a project sponsored by DARPA from 1995 to 2001.
PEOPLE
Prof. Jonathan H. Chao : Faculty
Prof. Shiv Panwar : Faculty
Yanming Shen : Post Doctor
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