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VLSI IMPLEMENTATIONS


VLSI Implementations
  1. "Arc: An ATM Routing and Concentration Chip"
    H. J. Chao and N. Uzun
    Intl. Symposium on VLSI Technology, Systems, and Applications, pp. 102-107, Jun. 1997.

  2. "An ATM routing and concentration chip for a scalable multicast ATM switch"
    H. J. Chao and N. Uzun
    IEEE J. Solid-State Circuits, Vol. 32, no. 6, pp. 816-828, June 1997.

  3. "A VLSI Sequencer chip for ATM traffic shaper and queue manager"
    H. J. Chao and N. Uzun
    IEEE J. Solid-State Circuits, vol. 27, no. 11, pp. 1634-1643, Nov. 1992.

  4. "Implementation of an ATM layer chip for B-ISDN applications"
    C. A. Johnston and H. J. Chao
    IEEE Intl. Conf. on Commun., vol. 2, pp. 704-710, Jun. 1991.

  5. "The ATM layer chip: an ASIC for B-ISDN applications"
    C. A. Johnston and H. J. Chao
    IEEE J. Select. Areas Commun., vol. 9, no. 5, pp. 741-750, June 1991.

  6. "Behavior analysis of CMOS D flip-flops,
    H. J. Chao and C. A. Johnston
    IEEE J. Solid-State Circuits, vol. 24, no. 5, pp. 1454-1458, Oct. 1989.

  7. "A 140 Mbit/s CMOS LSI framer chip for a broadband ISDN local access system"
    H. J. Chao, T. J. Robe, and L. S. Smoot
    IEEE J. Solid-State Circuits, vol. 23, no. 1, pp. 133-141, Feb. 1988.