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QUALITY OF SERVICE (QOS) CONTROL


 • Packet Scheduling
 • Buffer Management and Congestion Control
 • Traffic Shaper
 • Call Admission Control (CAC)
 • Flow and Congestion Control


Packet Scheduling
  1. "Multiple delay bounds control algorithm via class-level service curves"
    D. Jeong, H. J. Chao, and H. Kim
    in IEICE Trans. Commun, vol. E85-B, no. 7, pp. 1302-1311, Dec. 2002

  2. "Fast Ping-Pong Arbitration for Input-Output Queued Packet Switches"
    H. J. Chao, C. H. Lam, and X. Guo
    International Journal of Communication Systems, vol. 14, pp. 663-678, June 2001.

  3. "Saturn: A terabit packet switch using dual round-robin"
    H. J. Chao
    IEEE Communications Magazine, Vol. 8, No. 12, pp. 78-84, Dec. 2000.

  4. "Delay-bound guarantee in combined input-output buffered switches"
    H. J. Chao and Li-Sheng Chen
    IEEE Global Telecommunications Conference (GLOBECOM), Vol. 1, pp. 515-524, Nov. 2000.

  5. "A Differentiated Services Architecture for Multimedia Streaming in Next Generation Internet"
    T. Hou, D. Wu, B. Li, T. Hamada, I. Ahmad, and H. J. Chao
    Computer Networks, vol. 32, no. 2, pp. 185-209, Elsevier, Feb. 2000.

  6. "Design of Packet Fair Queuing Schedulers Using a RAM-based Searching Engine"
    H. J. Chao, Y. R. Jenq, X. Guo, and C. H. Lam
    in IEEE J. Select. Areas Commun., pp. 1105-1126, June 1999.

  7. "Design of a Generalized Priority Queue Manager for ATM Switches"
    H. J. Chao, H. Cheng, Y. R. Jenq, and D. Jeong
    IEEE J. Select. Areas Commun., Vol. 15, No. 5, pp. 867-880, June 1997.

  8. "A priority CAM chip for a generic ATM scheduler"
    H. J. Chao and Y. R. Jenq
    in IEEE ATM Workshop Proceeding, San Francisco, CA, Aug. 1996.

  9. "An ATM queue manager with multiple delay and loss priorities"
    H. J. Chao and N. Uzun
    in IEEE/ACM Trans. on Networking, vol. 3, no. 6, pp. 652-659, Dec. 1995.

  10. "A novel architecture for queue management in the ATM network"
    H. J. Chao
    IEEE J. Select. Areas Commun., vol. 9, no. 7, pp. 1110-1118, Sep. 1991.

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Buffer Management and Congestion Control
  1. "Buffer Management and Scheduling Schemes for TCP/IP over ATM-GFR"
    D. Wu and H. J. Chao
    International Journal of Communication Systems, vol. 14, no. 4, pp. 345-359, John Wiley, May 2001.

  2. "A Per Flow Based Node Architecture for Integrated Services Packet Networks"
    D. Wu, T. Hou, B. Li, and H. J. Chao
    Telecommunication Systems, vol. 17, issue 1/2, pp. 135-160, Kluwer Academic Publishers, May/June 2001.

  3. "Sizing a packet reassembly buffer at a host computer in an ATM network"
    D. E. Smith and H. J. Chao
    in IEEE/ACM Trans. on Networking, vol. 3, no. 6, pp. 798-808, Dec. 1995.

  4. "A shared-memory virtual channel queue for ATM broadband terminal adapter"
    H. J. Chao and D. E. Smith
    Intl. J. Digital and Analog Communication Systems, vol. 5, no. 1, pp. 29-37, January-March 1992.

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Traffic Shaper
  1. "Design of an ATM Shaping Multiplexer with Guaranteed Output Burstiness"
    H. J. Chao and J. S. Hong
    Intl. Journal of Computer System Science & Engineering, Special issue on ATM Switching, Vol. 12, no. 2, pp. 131-141, March 1997.

  2. "Design of leaky bucket access control schemes in ATM networks"
    H. J. Chao
    International Conference on Communications, Vol. 1, pp. 180-187, June 1991.

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Call Admission Control (CAC)
  1. "Efficient Bandwidth Allocation and Call Admission Control for VBR Service Using UPC Parameters"
    D. Wu and H. J. Chao
    International Journal of Communication Systems, vol. 13, no. 1, pp. 29-50, John Wiley, Feb. 2000.

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Flow and Congestion Control
  1. "Concept of Backlog Balancing and Its Application to Flow Control and Congestion Control in High-Speed Networks"
    X. Guo, T. Lee, and H. J. Chao
    IEICE Trans. Commun., Vol. E83-B, No. 9, Sep. 2000.

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